1. Field of the Invention
This invention relates generally to a method of assembly of a semiconductor device in a flip chip configuration. More specifically this invention relates to a method of applying flux to the substrate in a semiconductor device in a flip chip configuration. Even more specifically this invention relates to an automated method of applying flux in a controlled amount to the substrate in a semiconductor device via a brush during a programmed pattern of strokes.
2. Discussion of the Related Art
The most important objective of semiconductor packaging is to support the original design objective and intent of the integrated circuit chips. In today's technology environment, there is an ever-increasing requirement to increase the integration of circuits onto a single semiconductor chip. At the same there is a requirement to increase the performance of the semiconductor chip, whether it is a memory chip, a microprocessor chip, a telecommunications chip or any other type of semiconductor chip. As more and more circuit functions are added to a chip, the number of interconnections also increases dramatically. An overriding factor in the increase of integration and increase of performance is the requirement to reduce the cost of the final product.
An early flip chip method of packaging semiconductors was developed in the early 1960s by IBM as a possible replacement for the expensive, unreliable, low-productivity, and manually operated face-up wire-bonding technology. However, because high-speed automatic wire bonders for the most part met the needs of the semiconductor industry there was not an aggressive development effort expended to improve the flip chip technology methods. Flip chip technology is defined as mounting the semiconductor chip to a substrate with any kind of interconnect materials and methods such as fluxless solder bumps, tape-automated bonding (TAB), wire interconnects, conductive polymers, anisotropic conductive adhesives, metallurgy bumps, compliant bumps, and pressure contacts as long as the active chip surface is facing the substrate.
As a direct result of the higher requirements of package density, performance, and interconnection, the limitations of face-up wire bonding technology, and the growing use of multichip module technology there is a need to improve the flip chip technology and to decrease the cost of the flip chip technology at the same time. The flip chip interconnects are being used in the semiconductor industry primarily because of their high I/O density capability, small profiles, and good electrical performance. Demands on performance, reliability, and cost have resulted in the development of a variety of flip chip technologies using solder, conductive epoxy, hard metal bump (such as gold) and anisotropic conductive epoxy interconnects. Among these materials, solders have remained a preferred choice as the material forming electrical connections in flip chip assemblies.
Solder flip chip interconnect systems consist of essentially three basic elements. These include the chip, the solder bump, and the substrate. The bumps are first deposited on a wafer and reflowed. The wafer is then diced into chips. The chips are flipped over, aligned to a substrate, tacked, and reflowed. An underfill may be used to improve the reliability of the interconnects. Each of these elements and the processes used to assemble them together affect the performance and the cost of the interconnect system. Therefore, the performance and cost must be compared on the basis of the interconnect system as a whole, and not merely on any single element of the interconnect assembly.
The materials and processes involved in the manufacture of the flip chip interconnect system determine its performance. The semiconductor device or the chip may be silicon or gallium arsenide. The bond pad metallization on the wafer can be Ni--Au, Cr--Cu--Au, TiW--Cu, Ti--Cu, or TiW--Au. The bump material can be one of a variety of Pb-based or Pb-free solders. The substrate can be silicon, alumina, glass, or one of a variety of organic substrates. The substrate metallization can be gold or copper. Underfills are used primarily to improve reliability of flip chip interconnect systems. These materials fill the gap between the chip and substrate around the solder joints, reducing the thermal stresses imposed on the solder joint.
The process step used in the manufacture of the interconnect systems can be varied and include process technologies such as plating, evaporation, wire bumping, dispensing, and printing. The reflow process may be performed in air with flux or in a controlled ambient. Flip chip bonding processes include those based on the controlled-collapse chip connection (C4) approach or those in which the geometry of the bump is controlled by the bonding equipment.
The cost of manufacturing a solder flip chip interconnect system is related to the manufacturing process technologies. Some basic elements of a cost model are the materials cost, number of process steps, equipment costs, floor space, and labor. The number of process steps has a significant influence on the cost, since they also affect equipment costs, floor space, and labor. A smaller number of process steps invariably results in lower costs. A significant reduction in cost is also achieved when a manual process step that requires an interruption of the process flow can be replaced by an automated process step.
In the flip chip interconnection system, after the bumps are formed on the substrate and before the chip is flipped and placed on the substrate a sticky flux is applied to the substrate and the bumps. This flux provides the adhesion needed to hold the chips in place until the reflow process takes place. The methods available to apply flux to the substrate include manually brushing the flux onto the substrate, die dip fluxing or spraying the flux onto the substrate. However, the quality of the process of manually brushing the flux onto the substrate is dependent upon the training of the person doing the brushing, the time of day (how long the person has been working) etc. For example, if the flux is not put on in sufficient thickness the bumps or pads may not be covered. Alternatively, if the flux is put on too thick, the die will float off of the substrate during reflow due to the boiling action of the flux. The quality of the process of spraying the flux onto the substrate depends upon the material of the substrate. Different substrate materials/flux materials have different surface tensions that cause the flux materials to bead. The beading of the flux material has a serious deleterious effect of the quality of the interconnect assembly.
Therefore, what is needed is an automated method and process to apply flux to the substrate to achieve a controlled amount of flux to the substrate so that all pads or bumps are uniformly covered and that is not affected by the surface tension of the substrate material.